1. Field of the Invention
The present invention relates to a transistor structure utilized in a nonvolatile semiconductor memory device.
2. Description of the Related Art
Large capacity storage devices such as NAND flash memory are widely used in consumer-oriented household electrical goods such as storage cards. Since the storage devices used many of these household electrical goods require high reliability and long-term storage stability.
There are typically two kinds of cell structure in NAND flash memory, namely, floating gate (hereafter referred to as “FG”) type structure and MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor) type structure. The FG type structure and MONOS type structure are described below.
In the FG type structure, a charge is stored in a floating gate composed of a conductor (for example, polysilicon) disposed on a gate insulating film (tunnel insulating film) of a MOSFET. The FG type structure stores information based on the difference in the amount of charge stored.
On the other hand, in the MONOS type structure, a charge is stored in a trap level in a charge storage film (for example, a silicon nitride (SiN) film) instead of in the floating gate. The MONOS type structure is similar to the FG type structure in that information is stored based on the difference in the amount of charge stored.
The FG type structure is adopted as the cell structure in NAND flash memory, because the FG type structure has good charge storing (hereafter referred to as “retention”) characteristic. On the other hand, the MONOS type structure allows a greater degree of thinning in its charge storage film. As a result, shifting of a threshold voltage in memory cell transistors caused by capacitance coupling with adjacent cells can be reduced. A memory cell transistor with a MONOS type structure is reported in “Charge Trapping Memory Cell of TANOS (Si-Oxide-SiN—Al2O3-TaN) Structure Compatible to Conventional NAND Flash Memory” (IEEE NVSMW 2006. 21st Volume, Issue 2006 pp. 54-55), for example. This memory cell transistor utilizes a tantalum nitride film (TaN) for the control gate electrode, an alumina film (Al2O3) that is a high dielectric constant insulating film for the block insulating film, a silicon nitride film for the charge storage film, and a silicon oxide film (SiO2) for the tunnel insulating film).
The retention characteristic of the memory cell transistor with the MONOS type structure is required to improve.
The cause of deterioration in the retention characteristic is considered to lie in the method of processing of the tunnel insulating film and the charge storage film. In fact, the retention characteristic is reported not to deteriorate when the tunnel insulating film and the charge storage film are not processed (refer to “Study of Local Trapping and STI Edge Effects on Charge-Trapping NAND Flash”, Electron Devices Meeting, 2007. IEDM 2007. IEEE International, pp. 161-164). In a conventional method of manufacturing a memory cell transistor having a MONOS type structure, Reactive Ion Etching (hereafter referred to as “RIE”) is used to form element isolation trenches and process the tunnel insulating film and the charge storage film at the same time. Damage to the tunnel insulating film and the charge storage film is thought to occur at that time. Accordingly, a method of manufacturing is reported in which the tunnel insulating film and the charge storage film are deposited subsequent to formation of the element isolation trench (refer to “Self Aligned Trap-Shallow Trench Isolation Scheme for the Reliability of TANOS (TaN/AlO/SiN/Oxide/Si) NAND Flash Memory”, IEEE NVSMW 2007. 22st Volume, Issue 2007 pp. 110-111). However, when manufacture is performed by this method, the problem arises that the charge storage films of adjacent memory cell transistors become joined in structure, whereby charge in a charge storage film shifts to an adjacent memory cell transistor.